Publications

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The search has obtained 59 results.

  • Alessandra Melani, Maria A. Serrano, Marko Bertogna, Isabella Cerutti, Eduard Quiñones and Giorgio Buttazzo. A static scheduling approach to enable safety-critical OpenMP applications . In 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo (Japan), Jan 2017.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Time-Randomized Processors for Secure and Reliable High-Performance Computing. In 1st Workshop on Pioneering Processor Paradigms, Austin (United States), Feb 2017.

  • Pedro Alonso, Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí and Rafael Rodríguez-Sánchez. Reduction to Tridiagonal Form for Symmetric Eigenproblems on Asymmetric Multicore Processors. In 8th International Workshop on Programming Models and Applications for Multicores and Manycores (PMAM 2017), pp. 39-47, Austin, Texas (United States), Feb 2017. http://doi.acm.org/10.1145/3026937.3026938.

  • Rajiv Nishtala, Paul Carpenter, Vinicius Petrucci and Xavier Martorell. Hipster: Hybrid Task Manager for Latency-Critical Cloud Workloads. In The 23rd IEEE Symposium on High Performance Computer Architecture (HPCA 2017), Austin, TX (United States), Feb 2017.

  • Matina Maria Trompouki and Leonidas Kosmidis. Optimisation Opportunities and Evaluation for GPGPU Applications on Low-End Mobile GPUs. In Design, Automation, and Test in Europe conference (DATE), pp. 950-953, Lausanne (Switzerland), Mar 2017.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Aging Assessment and Design Enhancement of Randomized Cache Memories. IEEE Transactions on Device and Materials Reliability, pp. 32-41, vol. 17, no. 1, Mar 2017.

  • Gina Alioto, Paul Carpenter, Christophe Avare, Marcus Leich, Adrian Cristal and Osman Unsal. RETHINK big: European Roadmap for Hardware and Networking Optimizations for Big Data. In Design, Automation, and Test in Europe conference (DATE), Lausanne (Switzerland), Mar 2017.

  • Gladys Utrera, Jordi Fornes and Montse Farreras. Task Packing: Getting the Best from MPI Unbalanced Applications. In 25th Euromicro International Conference on Parallel, Distributed and Network-based Processing, PDP 2017, pp. 547-550, Sant Petersburgo (Russian Federation), Mar 2017.

  • Mladen Slijepcevic, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Design and Implementation of a Fair Credit-Based Bandwidth Sharing Scheme for Buses. In Design, Automation, and Test in Europe conference (DATE), pp. 1-4, Lausanne (Switzerland), Mar 2017.

  • Gladys Utrera, Jordi Fornes and Jesús Labarta. Noise Inspector Tool. In 25th Euromicro International Conference on Parallel, Distributed and Network-based Processing, PDP 2017, pp. 543-546, Sant Petersburgo (Russian Federation), Mar 2017.

  • Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster and Francisco J. Cazorla. Dynamic Software Randomisation: Lessons Learned From an Aerospace Case Study. In Design, Automation, and Test in Europe conference (DATE), pp. 1-6, Lausanne (Switzerland), Mar 2017.

  • Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernandez, Eduard Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado and Luca Fossati. Probabilistic Timing Analysis on Time-Randomized Platforms for the Space Domain. In Design, Automation, and Test in Europe conference (DATE), pp. 1-2, Lausanne (Switzerland), Mar 2017.

  • Suzana Milutinovic, Jaume Abella and Francisco J. Cazorla. On the assessment of probabilistic WCET estimates reliability for arbitrary programs. Eurasip Journal on Embedded Systems, Apr 2017.

  • Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega and Francisco J. Cazorla. EPC Enacted: Integration in an Industrial Toolbox and Use Against a Railway Application. In 23rd IEEE Real-Time and Embedded Technology and Applications Symposium, Pittsburgh (United States), Apr 2017.

  • Sebastian Kehr, Eduard Quiñones, Dominik Langen, Bert Boeddeker and Guenter Schaefer. Parcus: Energy-aware and Robust Parallelization of AUTOSAR Legacy Applications. In 23rd IEEE Real-Time and Embedded Technology and Applications Symposium, Pittsburgh (United States), Apr 2017.

  • Marta Garcia-Gasulla. Dynamic Load Balancing for Hybrid Applications. PhD thesis, Universitat Politècnica de Catalunya (UPC), Apr 2017. Advisor Julita Corbalán and Jesús Labarta.

  • Ugljesa Milic, Alejandro Rico, Paul Carpenter and Alex Ramirez. Sharing the Instruction Cache Among Lean Cores on an Asymmetric CMP for HPC Applications. In 2017 IEEE International Symposium on Performance Analysis of Systems and Software, Santa Rosa, California (United States), Apr 2017.

  • Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduard Quiñones, Tullio Vardanega and Francisco J. Cazorla. Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. IEEE Transactions on Computers, pp. 586-600, vol. 66, no. 4, Apr 2017.

  • Maria A. Serrano, Alessandra Melani, Sebastian Kehr, Marko Bertogna and Eduard Quiñones. An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-based Global Fixed Priority Scheduling. In the 19th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC), Toronto (Canada), May 2017.

  • Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí and Rafael Rodríguez-Sánchez. Energy balance between voltage-frequency scaling and resilience for linear algebra routines on low-power multicore architectures. Parallel Computing, May 2017. https://doi.org/10.1016/j.parco.2017.05.004 Available online 24 May 2017.

  • Sandra Catalán, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí and José R. Herrero. Static versus Dynamic Task Scheduling of the LU Factorization on ARM big.LITTLE Architectures. In 7th International Workshop on Accelerators and Hybrid Exascale Systems (AsHES 2017), Orlando, Florida (United States), May 2017.

  • Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega and Francisco J. Cazorla. On uses of Extreme Value Theory fit for industrial-quality WCET analysis. In 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse (France), Jun 2017.

  • Victor López, Ana Jokanovic, Marco D Amico, Marta Garcia-Gasulla, Raül Sirvent and Julita Corbalán. DJSB: Dynamic Job Scheduling Benchmark. In 21st Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP 2017), Orlando (United States), Jun 2017.

  • Renan Fischer e Silva and Paul Carpenter. Energy Efficient Ethernet on MapReduce Clusters: Packet Coalescing To Improve 10GbE Links. IEEE/ACM Transactions on Networking, Jun 2017.

  • Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-Askasua, Enrico Mezzetti, Tullio Vardanega and Francisco J. Cazorla. Software Time Reliability in the Presence of Cache Memories. In 22nd International Conference on Reliable Software Technologies, Viena (Austria), Jun 2017.

  • Darko Zivanovic, Milan Pavlovic, Milan Radulovic, Hyunsung Shin, Jongpil son, Sally McKee, Paul Carpenter, Petar Radojkovic and Eduard Ayguadé. Main Memory in HPC: Do We Need More, or Could We Live With Less?. ACM Transactions on Architecture and Code Optimization, Jun 2017.

  • Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul Carpenter, Nacho Navarro and Alex Ramirez. Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors. International Journal of Parallel Programming, pp. 1-21, Jun 2017.

  • Milos Panic, Jaume Abella, Eduard Quiñones, Carles Hernandez, Theo Ungerer and Francisco J. Cazorla. Adapting TDMA Arbitration for Measurement-Based Probabilistic Timing Analysis. Microprocessors and Microsystems, pp. 188-201, vol. 52, Jun 2017.

  • Sara Royuela, Xavier Martorell, Eduard Quiñones and Luis Miguel Pinho. OpenMP Tasking Model for Ada: Safety and Correctness. In 22nd International Conference on Reliable Software Technologies, Viena (Austria), Jun 2017.

  • Javier Díaz, Pablo Ibáñez, Teresa Monreal, Victor Viñals and José M. Llabería. ReD: A Policy Based on Reuse Detection for a Demanding Block Selection in Last-Level Caches. In The 2nd Cache Replacement Competition Workshop (CRC-2), pp. 1-4, Toronto, ON (Canada), Jun 2017. accepted to appear in The 2nd Cache Replacement Competition Workshop (CRC-2), co-located with ISCA-17.

  • Luis Garrido and Paul Carpenter. Aggregating and Managing Memory Across Computing Nodes in Cloud Environments. In 12th Workshop on Virtualization in High-Performance Cloud Computing (VHPC 17), Frankfurt (Germany), Jun 2017.

  • Jaume Abella, Maria Padilla, Joan del Castillo and Francisco J. Cazorla. Measurement-Based Worst-Case Execution Time Estimation Using the Coefficient of Variation. ACM Transactions on Design Automation of Electronic Systems , pp. 72-72, vol. 22, no. 4, Jun 2017.

  • Carles Hernandez, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros and Franck Wartel. Design and Implementation of a Time Predictable Processor: Evaluation with a Space Case Study. In 29th Euromicro Conference on Real-Time Systems , Dubrovnik (Croatia), Jun 2017.

  • Jordi Guitart. Toward Sustainable Data Centers: a Comprehensive Energy Management Strategy. Computing, pp. 597-615, vol. 99, no. 6, Jun 2017. [PDF]

  • Sergi Alcaide, Carles Hernandez, Antoni Roca Perez and Jaume Abella. DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis. In 54th Design Automation Conference, Austin (United States), Jun 2017.

  • Irune Agirre, Jaume Abella, Mikel Azkarate-Askasua and Francisco J. Cazorla. On the Tailoring of CAST-32A Certification Guidance to Real COTS Multicore Architectures. In 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse (France), Jun 2017.

  • Carles Hernandez, Nils-Johan Wessman, Leonidas Kosmidis, Alen Bardizbanyan, Jaume Abella, Jan Andersson and Francisco J. Cazorla. EFL: Enabling Timing Guarantees in Multi-core Processors with Shared Caches. In 22nd Data Systems In Aerospace Conference, Goteborg (Sweden), Jun 2017.

  • Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding. In 22nd International Conference on Reliable Software Technologies, Viena (Austria), Jun 2017.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Modelling Bus Contention during System Early Design Stages. In 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse (France), Jun 2017.

  • Karim Djemame, Raimon Bosch, Richard Kavanagh, Pol Alvarez, Jorge Ejarque, Jordi Guitart and Lorenzo Blasi. PaaS-IaaS Inter-Layer Adaptation in an Energy-Aware Cloud Environment. IEEE Transactions on Sustainable Computing, pp. 127-139, vol. 2, no. 2, Jun 2017. [PDF]

  • Jaume Bosch, Xubin Tan, Carlos Álvarez, Daniel Jiménez, Xavier Martorell and Eduard Ayguadé. Characterizing and Improving the Performance of Many-Core Task-Based Parallel Programming Runtimes. In Second Annual Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware, pp. 1285-1292, Orlando (United States), Jul 2017. DOI: 10.1109/IPDPSW.2017.32.

  • Xubin Tan, Jaume Bosch, Miquel Vidal, Carlos Álvarez, Daniel Jiménez, Eduard Ayguadé and Mateo Valero. General Purpose Task-Dependence Management Hardware for Task-Based Dataflow Programming Models. In 2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS), pp. 244-253, Orlando (United States), Jul 2017.

  • Mladen Slijepcevic, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis. In 20th Euromicro Conference on Digital System Design (DSD), Viena (Austria), Aug 2017.

  • Brian Jiménez, Jorge Roel-Touris, Miguel Romero-Durana, Miquel Vidal, Daniel Jiménez and Juan Fernández-Recio. LightDock: a new multi-scale approach to protein–protein docking. Bioinformatics, Sep 2017. https://doi.org/10.1093/bioinformatics/btx555.

  • Sara Royuela, Alejandro Duran, Maria A. Serrano, Eduard Quiñones and Xavier Martorell. A functional safety OpenMP for critical real-time embedded systems. In 13th International Workshop on OpenMP (IWOMP), New York (United States), Sep 2017.

  • Leonidas Kosmidis. Enabling Caches in Probabilistic Timing Analysis. PhD thesis, Universitat Politècnica de Catalunya (UPC), Sep 2017. Advisor Eduard Quiñones, Jaume Abella, Francisco J. Cazorla and Mateo Valero.

  • Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla and Mateo Valero. SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems. In 31st International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Campinas (Brazil), Oct 2017.

  • Mladen Slijepcevic. Probabilistically Time-Analyzable Complex Processor Designs. PhD thesis, Universitat Politècnica de Catalunya (UPC), Nov 2017. Advisor Francisco J. Cazorla, Jaume Abella and Carles Hernandez.

  • Joan del Castillo, Maria Padilla, Jaume Abella and Francisco J. Cazorla. Execution time distributions in embedded safety-critical systems using extreme value theory. International Journal of Data Analysis Techniques and Strategies (IJDATS), pp. 348-361, vol. 9, no. 4, Dec 2017.

  • Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernandez, Tullio Vardanega and Guillem Bernat. Reconciling Time Predictability and Performance in Future Computing Systems. IEEE Design and Test, Dec 2017. (to appear).

  • Gladys Utrera, Marisa Gil and Xavier Martorell. Analyzing the impact of communication imbalance in high-speed networks. Concurrency and Computation Practice and Experience, pp. 1-15, Dec 2017. Special issue paper. e4394. https://doi.org/10.1002/cpe.4394.

  • Enrico Mezzetti, Jaume Abella, Carles Hernandez and Francisco J. Cazorla. Work-in-Progress paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling. In 38th IEEE Real-Time Systems Symposium (RTSS), Paris (France), Dec 2017.

  • Gabriel Fernandez, Francisco J. Cazorla and Jaume Abella. Consumer Electronics Processors for Critical Real-Time Systems: a (Failed) Practical Experience. In 9th European Congress on Embedded Real Time Software and Systems (ERTS^2), Toulouse (France), Jan 2018.

  • Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella and Francisco J. Cazorla. High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V. IEEE Micro, Feb 2018. to appear.

  • Pedro Benedicte, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Design and Integration of Hierarchical-Placement Multi-level Caches for Real-Time Systems. In 21st Design, Automation and Test in Europe Conference (DATE), Dresden (Germany), Mar 2018.

  • Pedro Benedicte, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. RPR: A Random Replacement Policy with Limited Pathological Replacements. In 33rd ACM Symposium On Applied Computing (SAC), Pau (France), Apr 2018.

  • Enrique Díaz, Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella and Francisco J. Cazorla. Modelling Multicore Contention on the AURIX TC27x. In 55th Design Automation Conference (DAC), San Francisco (United States), Jun 2018.

  • Suzana Milutinovic, Jaume Abella, Enrico Mezzetti and Francisco J. Cazorla. Measurement-Based Cache Representativeness on Multipath Programs. In 55th Design Automation Conference (DAC), San Francisco (United States), Jun 2018.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Cache Side-Channel Attacks and Time-Predictability in High-Performance Critical Real-Time Systems. In 55th Design Automation Conference (DAC), San Francisco (United States), Jun 2018.
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