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The search has obtained 107 results.

  • Petar Radojkovic, Paul Carpenter, Miquel Moretó, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky and Mateo Valero. Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach. IEEE Transactions on Computers, pp. 256-269, vol. 65, no. 1, Jan 2016. Volume and number to be updated once that the paper is published (after January 2016).

  • Roberto Enrique Vargas Caballero, Eduard Quiñones, Maria A. Serrano, Xavier Martorell and Sara Royuela. A Lightweight OpenMP4 Run/time for Embedded Systems. In In the 21st Asia and South Pacific Design Automation Conference, Macao (China), Jan 2016.

  • Javier Jalle, Mikel Fernández, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello and Francisco J. Cazorla. Bounding Resource-Contention Interference in the Next-Generation Multipurpose Processor (NGMP). In 8th European Congress on Embedded Real Time Software and Systems (ERTS^2), Toulouse (France), Jan 2016.

  • Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Daniel A. Jiménez and Mateo Valero. Sensible Energy Accounting with Abstract Metering for Multicore Systems . ACM Transactions on Architecture and Code Optimization, vol. 12, no. 4, Jan 2016.

  • Gladys Utrera, Marisa Gil and Xavier Martorell. Analyzing Data-Error Propagation Effects in High-Performance Computing. In 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, pp. 418-421, Heraklion Crete (Greece), Feb 2016. high performance, fault-injection, reliability, Error propagation.

  • Michail Alvanos, Montse Farreras, Ettore Tiotto, José Nelson Amaral and Xavier Martorell. Combining Static and Dynamic Data Coalescing in Unified Parallel C. IEEE Transactions on Parallel and Distributed Systems, pp. 381-393, vol. 27, no. 2, Feb 2016. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7045602.

  • Gregory Katsaros, Pascal Stichler, Josep Subirats and Jordi Guitart. Estimation and forecasting of ecological efficiency of virtual machines. Future Generation Computer Systems, pp. 480-494, vol. 55, Feb 2016. [PDF]

  • Mario Macias and Jordi Guitart. Analysis of a Trust Model for SLA Negotiation and Enforcement in Cloud Markets. Future Generation Computer Systems, pp. 460-472, vol. 55, Feb 2016. [PDF]

  • Maria A. Serrano, Alessandra Melani, Marko Bertogna and Eduard Quiñones. Response-Time Analysis of DAG Tasks under Fixed Priority Scheduling with Limited Preemptions. In Design, Automation, and Test in Europe conference (DATE), Dresden (Germany), Mar 2016.

  • Manolis Marazakis, John Goodacre, Didier Fuin, Paul Carpenter, John Thomson, Emil Matus, Antimo Bruno, Per Stenström, Jerome Martin, Yves Durand and Isabelle Dor. EUROSERVER: Share-Anything Scale-Out Micro-Server Design. In Design, Automation, and Test in Europe conference (DATE), Dresden (Germany), Mar 2016.

  • Paolo Burgio, Carlos Álvarez, Eduard Ayguadé, Antonio Filgueras, Daniel Jiménez, Xavier Martorell, Nacho Navarro and Roberto Giorgi. Simulating next-generation cyber-physical computing platforms. Ada User Journal, pp. 59-63, vol. 37, no. 1, Mar 2016.

  • Milos Panic, Carles Hernandez, Jaume Abella, Antoni Roca Perez, Eduard Quiñones and Francisco J. Cazorla. Improving Performance Guarantees in Wormhole Mesh NoC Designs. In Design, Automation, and Test in Europe conference (DATE), Dresden (Germany), Mar 2016.

  • Andreu Carbó, Eduard Oró, Jaume Salom, Mauro Canuto, Mario Macias and Jordi Guitart. Experimental and Numerical Analysis for Potential Heat Reuse in Liquid Cooled Data Centres. Energy Conversion and Management , pp. 135-145, vol. 112, Mar 2016. [PDF]

  • Marc González. Coarse Grain Parallelization of Deep Neural Networks. In Principles and Practice of Parallel Programming, Barcelona (Spain), Mar 2016.

  • Marc Riera Villanueva, Ramon Canal, Jaume Abella and Antonio González. A Detailed Methodology to Soft Error Rates in Advanced Technologies. In Design, Automation, and Test in Europe conference (DATE), Dresden (Germany), Mar 2016.

  • Sebastian Kehr, Milos Panic, Eduard Quiñones, Bert Boeddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla and Guenter Schaefer. Supertask: Maximizing Runnable-level Parallelism in AUTOSAR Applications. In Design, Automation, and Test in Europe conference (DATE), Dresden (Germany), Mar 2016.

  • Alexandra Ferrerón, Darío Suárez, Jesús Alastruey, Teresa Monreal and Pablo Ibáñez. Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage. IEEE Transactions on Computers, pp. 755-769, vol. 65, no. 3, Mar 2016. TC/TNANO Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. DOI: 10.1109/TC.2015.2479585 (Online publication of 18 September 2015).

  • Matina Maria Trompouki and Leonidas Kosmidis. Towards General Purpose Computations on Low-End Mobile GPUs. In Design, Automation, and Test in Europe conference (DATE), pp. 539-542, Dresden (Germany), Mar 2016.

  • Xubin Tan, Jaume Bosch, Daniel Jiménez, Carlos Álvarez, Eduard Ayguadé and Mateo Valero. Performance analysis of a hardware accelerator of dependence management for taskbased dataflow programming models. In 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2016), pp. 224-234, Uppsala (Sweden), Apr 2016. DOI: 10.1109/ISPASS.2016.7482097.

  • Jose Luis Vivas, Francisco Brasilero, Abmar Barros, Giovanni Farias da Silva, Marcos Nobrega Jr, Francisco Germano De Araujo Neto, Ignacio Blanquer, Erik Torres, Giovanni Aloisio, Rosa M. Badia, Daniele Lezzi, Antonio Tadeu Gomes, Jacek Cala, Maria Julia De Lima and Cristina Uruahy. EUBrazilCC Federated Cloud: A Transatlantic Multi-Cloud Infrastructure. In Developing Interoperable and Federated Cloud Architecture, pp. 220-252, IGI Global, Apr 2016.

  • Milos Panic, Carles Hernandez, Eduard Quiñones, Jaume Abella and Francisco J. Cazorla. Modeling High-Performance Wormhole NoCs for Critical Real-Time Embeddedd Systems. In 22nd IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), Vienna (Austria), Apr 2016.

  • David Trilla, Javier Jalle, Mikel Fernández, Jaume Abella and Francisco J. Cazorla. Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems. In 22nd IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), Vienna (Austria), Apr 2016.

  • Xubin Tan, Carlos Álvarez, Daniel Jiménez, Eduard Ayguadé and Mateo Valero. Task dependences management hardware acceleration for task-based dataflow programming models. In 3rd International BSC Doctoral Symposium 2016, pp. 134-136, Barcelona (Spain), May 2016.

  • Suzana Milutinovic, Jaume Abella and Francisco J. Cazorla. Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns. In 19th IEEE Symposium On Real-Time Computing (ISORC), York (United Kingdom), May 2016.

  • Javier Jalle, Jaume Abella, Luca Fossati, Marco Zulianello and Francisco J. Cazorla. Validating a Timing Simulator for the NGMP Multicore Processor. In 21st Data Systems In Aerospace Conference (DASIA), Tallin (Estonia), May 2016.

  • Mauro Canuto and Jordi Guitart. Integrated Policy Management Framework for IaaS Cloud Middleware. Computing, pp. 471-494, vol. 98, no. 5, May 2016. [PDF]

  • Pedro Benedicte, Leonidas Kosmidis, Eduard Quiñones, Jaume Abella and Francisco J. Cazorla. Modeling the Confidence of Timing Analysis for Time Randomised Caches. In 11th IEEE International Symposium on Industrial Embedded Systems (SIES), Krakow (Poland), May 2016.

  • Javier Jalle, Mikel Fernández, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello and Francisco J. Cazorla. Contention-Aware Performance Monitoring Counter Support for Real-Time MPSoCs. In 11th IEEE International Symposium on Industrial Embedded Systems (SIES), Krakow (Poland), May 2016.

  • Javier Jalle, Eduard Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello and Francisco J. Cazorla. Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems. In 11th IEEE International Symposium on Industrial Embedded Systems (SIES), Krakow (Poland), May 2016.

  • Qixiao Liu. Per-Task Energy Metering and Accounting in the Multicore Era. PhD thesis, Universitat Politècnica de Catalunya (UPC), May 2016. Advisor Miquel Moretó, Francisco J. Cazorla, Jaume Abella and Mateo Valero.

  • Cecilia González, Jennifer B. Sartor, Carlos Álvarez, Daniel Jiménez and Lieven Eeckhout. MInGLE: An efficient framework for domain acceleration using low-power specialized functional units. ACM Transactions on Architecture and Code Optimization, pp. 17-17, vol. 13, no. 2, Jun 2016. DOI: 10.1145/2898356.

  • Carles Hernandez, Jaume Abella, Andrea Gianarro, Jan Andersson and Francisco J. Cazorla. Random Modulo: a New Processor Cache Design for Real-Time Critical Systems. In 53rd Design Automation Conference (DAC), Austin (United States), Jun 2016.

  • Pedro Benedicte, Leonidas Kosmidis, Eduard Quiñones, Jaume Abella and Francisco J. Cazorla. A Confidence Assessment of WCET Estimates for Software Time Randomized Caches. In 14th IEEE International Conference on Industrial Informatics (INDIN), Poitiers (France), Jul 2016.

  • Karim Djemame, Django Armstrong, Jordi Guitart and Mario Macias. A Risk Assessment Framework for Cloud Computing. IEEE Transactions on Cloud Computing, pp. 265-278, vol. 4, no. 3, Jul 2016. [PDF]

  • Javier Jalle. Improving Time Predictability of Shared Hardware Resources in Real-time Multicore systems: Emphasis on the Space Domain. PhD thesis, Universitat Politècnica de Catalunya (UPC), Jul 2016. Advisor Francisco J. Cazorla, Luca Fossati, Eduard Quiñones and Jaume Abella.

  • Jaime Espinosa, Carles Hernandez and Jaume Abella. Modeling RTL Fault Models Behavior to Increase the Confidence on TSIM-based Fault Injection. In 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Sant Feliu de Guíxols (Spain), Jul 2016.

  • Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Boeddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduard Quiñones, Milos Panic, Jaume Abella, Carles Hernandez, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde and Arthur Pyka. Parallelizing Industrial Hard Real-time Applications for the parMERASA Multi-core. ACM Transactions on Embedded Computing Systems, pp. 53-53, vol. 15, no. 3, Jul 2016.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Resilient Random Modulo Cache Memories for Probabilistically-Analyzable Real-Time Systems. In 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Sant Feliu de Guíxols (Spain), Jul 2016.

  • Enrique Díaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-Askasua, Tullio Vardanega and Francisco J. Cazorla. Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis. In 16th International Workshop on Worst-Case Execution Time Analysis, Toulouse (France), Jul 2016.

  • Xubin Tan, Jaume Bosch, Daniel Jiménez, Carlos Álvarez and Eduard Ayguadé. Hardware accelerator of dependence management for task-based programming models. In Twelfth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Poster Session, Fiuggi (Italy), Jul 2016.

  • Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduard Quiñones, Jaume Abella, Tullio Vardanega and Francisco J. Cazorla. Measurement-Based Timing Analysis of the AURIX Caches. In 16th International Workshop on Worst-Case Execution Time Analysis (WCET), Toulouse (France), Jul 2016.

  • Josep Llosa, Carlos Álvarez, Agustín Fernández and Fermín Sánchez. El impacto de eliminar el examen final. In XXII Jornadas sobre la Enseñanza Universitaria de la Informática, pp. 69-76, Almeria (Spain), Jul 2016. [PDF]

  • Marisa Gil and Beatriz Otero. Learning Engineering Skills through Creativity and Collaboration: A Game-Based Proposal. In Gamification-based e-learning strategies for computer programming education, pp. 14-29, IGI Global, Aug 2016.

  • Somnath Mazumdar, Eduard Ayguadé, Nicola Bettin, Javier Bueno-Hedo, Sara Ermini, Antonio Filgueras, Daniel Jiménez, Carlos Álvarez, Xavier Martorell, Francesco Montefoschi, David Oro, Dionisios Pnevmatikatos, Antonio Rizzo, Dimitris Theodoropoulos and Roberto Giorgi. AXIOM: a hardware-software platform for cyber physical systems. In 19th Euromicro Conference on Digital System Design (DSD), pp. 539-546, Limassol (Cyprus), Aug 2016. DOI: 10.1109/DSD.2016.80.

  • Enric Morancho. Unum: Adaptive Floating-Point Arithmetic. In 19th Euromicro Conference on Digital System Design (DSD), pp. 651-656, Limassol (Cyprus), Aug 2016. http://dx.doi.org/10.1109/DSD.2016.39.

  • Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-Askasua, Franck Wartel, Liliana Cucu-Grosjean, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoît Triquet, Carles Hernandez, Code Lo, Cristian Maxim, David Morales, Eduard Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa R. Conmy and Walid Talaboulma. Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. In 19th Euromicro Conference on Digital System Design (DSD), Limassol (Cyprus), Aug 2016.

  • Mladen Slijepcevic, Mikel Fernández, Carles Hernandez, Jaume Abella, Eduard Quiñones and Francisco J. Cazorla. pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems. In 19th Euromicro Conference on Digital System Design (DSD), Limassol (Cyprus), Aug 2016.

  • Ugljesa Milic, Paul Carpenter, Alejandro Rico and Alex Ramirez. Rebalancing the core front-end through HPC code analysis. In 2016 IEEE International Symposium on Workload Characterization, pp. 1-10, Providence, RI (United States), Sep 2016.

  • Roberto Giorgi, Nicola Bettin, Paolo Gai, Xavier Martorell and Antonio Rizzo. AXIOM: A Flexible Platform for the Smart Home. In Components and Services for IoT Platforms, pp. 57-74, Springer International Publishing, Sep 2016.

  • Josep Llosa, Carlos Álvarez, Agustín Fernández and Fermín Sánchez. El impacto de eliminar el examen final. ReVisión, pp. 39-48, vol. 9, no. 3, Sep 2016. [PDF]

  • Karim Djemame, Richard Kavanagh, Django Armstrong, Francesc Lordan, Jorge Ejarque, Mario Macias, Raül Sirvent, Jordi Guitart and Rosa M. Badia. Energy Efficiency Support Through Intra-Layer Cloud Stack Adaptation. In 13th International Conference on Economics of Grids, Clouds, Systems, and Services (GECON16), pp. 129-143, Athens (Greece), Sep 2016. [PDF]

  • Darko Zivanovic, Milan Radulovic, Germán Llort, David Zaragoza, Janko Strassburg, Paul Carpenter, Petar Radojkovic and Eduard Ayguadé. Large-Memory Nodes for Energy Efficient High-Performance Computing. In The International Symposium on Memory Systems (MEMSYS17), Alexandria, VA (United States), Oct 2016.

  • Michael Wagner, Germán Llort, Antonio Filgueras, Daniel Jiménez, Harald Servat, Xavier Teruel, Estanislao Mercadel, Carlos Álvarez, Judit Giménez, Xavier Martorell, Eduard Ayguadé and Jesús Labarta. Monitorinng Heterogeneous Applications with the OpenMP tools interface. In 10th International Parallel Tools Workshop , pp. 41-58, Stuggart (Germany), Oct 2016.

  • Germán Llort, Antonio Filgueras, Daniel Jiménez, Harald Servat, Xavier Teruel, Estanislao Mercadel, Carlos Álvarez, Judit Giménez, Xavier Martorell, Eduard Ayguadé and Jesús Labarta. The Secrets of the Accelerators Unveiled: Tracing Heterogeneous Executions Through OMPT. In 12th International Workshop on OpenMP (IWOMP 2016), pp. 217-236, Nara (Japan), Oct 2016.

  • Leonidas Kosmidis, Eduard Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernandez, Andrea Gianarro, Ian Broster and Francisco J. Cazorla. Fitting Processor Architectures for Measurement-Based Probabilistic Timing Analysis. Journal on Microprocessors and Microsystems, pp. 287-302, vol. 47, no. B, Nov 2016.

  • Carlos Álvarez, Eduard Ayguadé, Jaume Bosch, Javier Bueno-Hedo, Artem Cherkashin, Antonio Filgueras, Daniel Jiménez, Xavier Martorell, Nacho Navarro, Miquel Vidal, Dimitris Theodoropoulos, Dionisios Pnevmatikatos, Davide Catani, David Oro, Carles Fernandez, Carlos Segura, Javier Rodriguez, Javier Hernando, Claudio Scordino, Paolo Gai, Pierluigi Passera, Alberto Pomella, Nicola Bettin, Antonio Rizzo and Roberto Giorgi. The AXIOM software layers. Microprocessors and Microsystems, pp. 262-277, vol. 47, no. B, Nov 2016. https://doi.org/10.1016/j.micpro.2016.07.002.

  • Karthikeyan Saravanan. Performance-aware Energy Optimisations in Networks for HPC. PhD thesis. PhD thesis, Universitat Politècnica de Catalunya (UPC), Nov 2016. Advisor Paul Carpenter and Alex Ramirez.

  • Diego Marrón, Jesse Read, Albert Bifet, Talel Abdessalem, Eduard Ayguadé and José R. Herrero. Echo State Hoeffding Tree Learning. In 8th Asian Conference on Machine Learning, pp. 382-397, Hamilton (New Zealand), Nov 2016. http://proceedings.mlr.press/v63/Marron87.html.

  • Leonidas Kosmidis, Roberto Enrique Vargas Caballero, David Morales, Eduard Quiñones, Jaume Abella and Francisco J. Cazorla. TASA: Toolchain-Agnostic Static Software Randomisation for Critical Real-Time Systems. In 35th International Conference On Computer Aided Design (ICCAD), Austin (Texas) (United States), Nov 2016.

  • Renan Fischer e Silva and Paul Carpenter. Controlling Network Latency in Mixed Hadoop Clusters: Do We Need Active Queue Management?. In The 41st IEEE Conference on Local Computer Networks (LCN) 2016, Dubai (United Arab Emirates), Nov 2016.

  • Mauro Canuto, Raimon Bosch, Mario Macias and Jordi Guitart. A Methodology for Full-System Power Modeling in Heterogeneous Data Centers. In 9th IEEE/ACM International Conference on Utility and Cloud Computing (UCC-16), pp. 20-29, Shanghai (China), Dec 2016. [PDF]

  • Sandra Catalán, José R. Herrero, Francisco D. Igual, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí and Chris Adeniyi-Jones. Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors. Journal of Computational Science, Dec 2016. https://doi.org/10.1016/j.jocs.2016.10.020 Available online 14 December 2016.

  • Roberto Giorgi, Somnath Mazumdar, Stefano Viola, Paolo Gai, Stefano Garzarella, Bruno Morelli, Dionisios Pnevmatikatos, Dimitris Theodoropoulos, Carlos Álvarez, Eduard Ayguadé, Javier Bueno-Hedo, Antonio Filgueras, Daniel Jiménez and Xavier Martorell. Modeling multi-board communication in the AXIOM cyber-physical system. Ada User Journal, pp. 228-235, vol. 37, no. 4, Dec 2016.

  • Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla and Mateo Valero. DReAM: an Approach to Estimate Per-Task DRAM Energy in Multicore Systems. ACM Transactions on Design Automation of Electronic Systems , pp. 1-25, vol. 22, no. 1, Dec 2016.

  • Alessandra Melani, Maria A. Serrano, Marko Bertogna, Isabella Cerutti, Eduard Quiñones and Giorgio Buttazzo. A static scheduling approach to enable safety-critical OpenMP applications . In 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo (Japan), Jan 2017.

  • Rajiv Nishtala, Paul Carpenter, Vinicius Petrucci and Xavier Martorell. Hipster: Hybrid Task Manager for Latency-Critical Cloud Workloads. In The 23rd IEEE Symposium on High Performance Computer Architecture (HPCA 2017), Austin, TX (United States), Feb 2017.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Time-Randomized Processors for Secure and Reliable High-Performance Computing. In 1st Workshop on Pioneering Processor Paradigms, Austin (United States), Feb 2017.

  • Pedro Alonso, Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí and Rafael Rodríguez-Sánchez. Reduction to Tridiagonal Form for Symmetric Eigenproblems on Asymmetric Multicore Processors. In 8th International Workshop on Programming Models and Applications for Multicores and Manycores (PMAM 2017), pp. 39-47, Austin, Texas (United States), Feb 2017. http://doi.acm.org/10.1145/3026937.3026938.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Aging Assessment and Design Enhancement of Randomized Cache Memories. IEEE Transactions on Device and Materials Reliability, pp. 32-41, vol. 17, no. 1, Mar 2017.

  • Matina Maria Trompouki and Leonidas Kosmidis. Optimisation Opportunities and Evaluation for GPGPU Applications on Low-End Mobile GPUs. In Design, Automation, and Test in Europe conference (DATE), pp. 950-953, Lausanne (Switzerland), Mar 2017.

  • Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernandez, Eduard Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado and Luca Fossati. Probabilistic Timing Analysis on Time-Randomized Platforms for the Space Domain. In Design, Automation, and Test in Europe conference (DATE), pp. 1-2, Lausanne (Switzerland), Mar 2017.

  • Mladen Slijepcevic, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Design and Implementation of a Fair Credit-Based Bandwidth Sharing Scheme for Buses. In Design, Automation, and Test in Europe conference (DATE), pp. 1-4, Lausanne (Switzerland), Mar 2017.

  • Gina Alioto, Paul Carpenter, Christophe Avare, Marcus Leich, Adrian Cristal and Osman Unsal. RETHINK big: European Roadmap for Hardware and Networking Optimizations for Big Data. In Design, Automation, and Test in Europe conference (DATE), Lausanne (Switzerland), Mar 2017.

  • Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster and Francisco J. Cazorla. Dynamic Software Randomisation: Lessons Learned From an Aerospace Case Study. In Design, Automation, and Test in Europe conference (DATE), pp. 1-6, Lausanne (Switzerland), Mar 2017.

  • Sebastian Kehr, Eduard Quiñones, Dominik Langen, Bert Boeddeker and Guenter Schaefer. Parcus: Energy-aware and Robust Parallelization of AUTOSAR Legacy Applications. In 23rd IEEE Real-Time and Embedded Technology and Applications Symposium, Pittsburgh (United States), Apr 2017.

  • Ugljesa Milic, Alejandro Rico, Paul Carpenter and Alex Ramirez. Sharing the Instruction Cache Among Lean Cores on an Asymmetric CMP for HPC Applications. In 2017 IEEE International Symposium on Performance Analysis of Systems and Software, Santa Rosa, California (United States), Apr 2017.

  • Suzana Milutinovic, Jaume Abella and Francisco J. Cazorla. On the assessment of probabilistic WCET estimates reliability for arbitrary programs. Eurasip Journal on Embedded Systems, Apr 2017.

  • Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega and Francisco J. Cazorla. EPC Enacted: Integration in an Industrial Toolbox and Use Against a Railway Application. In 23rd IEEE Real-Time and Embedded Technology and Applications Symposium, Pittsburgh (United States), Apr 2017.

  • Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduard Quiñones, Tullio Vardanega and Francisco J. Cazorla. Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. IEEE Transactions on Computers, pp. 586-600, vol. 66, no. 4, Apr 2017.

  • Marta Garcia-Gasulla. Dynamic Load Balancing for Hybrid Applications. PhD thesis, Universitat Politècnica de Catalunya (UPC), Apr 2017. Advisor Julita Corbalán and Jesús Labarta.

  • Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí and Rafael Rodríguez-Sánchez. Energy balance between voltage-frequency scaling and resilience for linear algebra routines on low-power multicore architectures. Parallel Computing, May 2017. https://doi.org/10.1016/j.parco.2017.05.004 Available online 24 May 2017.

  • Maria A. Serrano, Alessandra Melani, Sebastian Kehr, Marko Bertogna and Eduard Quiñones. An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-based Global Fixed Priority Scheduling. In the 19th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC), Toronto (Canada), May 2017.

  • Sandra Catalán, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí and José R. Herrero. Static versus Dynamic Task Scheduling of the LU Factorization on ARM big.LITTLE Architectures. In 7th International Workshop on Accelerators and Hybrid Exascale Systems (AsHES 2017), Orlando, Florida (United States), May 2017.

  • Renan Fischer e Silva and Paul Carpenter. Energy Efficient Ethernet on MapReduce Clusters: Packet Coalescing To Improve 10GbE Links. IEEE/ACM Transactions on Networking, Jun 2017.

  • Jordi Guitart. Toward Sustainable Data Centers: a Comprehensive Energy Management Strategy. Computing, pp. 597-615, vol. 99, no. 6, Jun 2017. [PDF]

  • Sara Royuela, Xavier Martorell, Eduard Quiñones and Luis Miguel Pinho. OpenMP Tasking Model for Ada: Safety and Correctness. In 22nd International Conference on Reliable Software Technologies, Viena (Austria), Jun 2017.

  • Victor López, Ana Jokanovic, Marco D Amico, Marta Garcia-Gasulla, Raül Sirvent and Julita Corbalán. DJSB: Dynamic Job Scheduling Benchmark. In 21st Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP 2017), Orlando (United States), Jun 2017.

  • Karim Djemame, Raimon Bosch, Richard Kavanagh, Pol Alvarez, Jorge Ejarque, Jordi Guitart and Lorenzo Blasi. PaaS-IaaS Inter-Layer Adaptation in an Energy-Aware Cloud Environment. IEEE Transactions on Sustainable Computing, pp. 127-139, vol. 2, no. 2, Jun 2017. [PDF]

  • Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding. In 22nd International Conference on Reliable Software Technologies, Viena (Austria), Jun 2017.

  • Luis Garrido and Paul Carpenter. Aggregating and Managing Memory Across Computing Nodes in Cloud Environments. In 12th Workshop on Virtualization in High-Performance Cloud Computing (VHPC 17), Frankfurt (Germany), Jun 2017.

  • Darko Zivanovic, Milan Pavlovic, Milan Radulovic, Hyunsung Shin, Jongpil son, Sally McKee, Paul Carpenter, Petar Radojkovic and Eduard Ayguadé. Main Memory in HPC: Do We Need More, or Could We Live With Less?. ACM Transactions on Architecture and Code Optimization, Jun 2017.

  • Carles Hernandez, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros and Franck Wartel. Design and Implementation of a Time Predictable Processor: Evaluation with a Space Case Study. In 29th Euromicro Conference on Real-Time Systems , Dubrovnik (Croatia), Jun 2017.

  • Irune Agirre, Jaume Abella, Mikel Azkarate-Askasua and Francisco J. Cazorla. On the Tailoring of CAST-32A Certification Guidance to Real COTS Multicore Architectures. In 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse (France), Jun 2017.

  • David Trilla, Carles Hernandez, Jaume Abella and Francisco J. Cazorla. Modelling Bus Contention during System Early Design Stages. In 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse (France), Jun 2017.

  • Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega and Francisco J. Cazorla. On uses of Extreme Value Theory fit for industrial-quality WCET analysis. In 12th IEEE International Symposium on Industrial Embedded Systems, Toulouse (France), Jun 2017.

  • Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-Askasua, Enrico Mezzetti, Tullio Vardanega and Francisco J. Cazorla. Software Time Reliability in the Presence of Cache Memories. In 22nd International Conference on Reliable Software Technologies, Viena (Austria), Jun 2017.

  • Javier Díaz, Pablo Ibáñez, Teresa Monreal, Victor Viñals and José M. Llabería. ReD: A Policy Based on Reuse Detection for a Demanding Block Selection in Last-Level Caches. In The 2nd Cache Replacement Competition Workshop (CRC-2), pp. 1-4, Toronto, ON (Canada), Jun 2017. accepted to appear in The 2nd Cache Replacement Competition Workshop (CRC-2), co-located with ISCA-17.

  • Carles Hernandez, Nils-Johan Wessman, Leonidas Kosmidis, Alen Bardizbanyan, Jaume Abella, Jan Andersson and Francisco J. Cazorla. EFL: Enabling Timing Guarantees in Multi-core Processors with Shared Caches. In 22nd Data Systems In Aerospace Conference, Goteborg (Sweden), Jun 2017.

  • Sergi Alcaide, Carles Hernandez, Antoni Roca Perez and Jaume Abella. DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis. In 54th Design Automation Conference, Austin (United States), Jun 2017.

  • Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul Carpenter, Nacho Navarro and Alex Ramirez. Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors. International Journal of Parallel Programming, pp. 1-21, Jun 2017.

  • Jaume Bosch, Xubin Tan, Carlos Álvarez, Daniel Jiménez, Xavier Martorell and Eduard Ayguadé. Characterizing and Improving the Performance of Many-Core Task-Based Parallel Programming Runtimes. In Second Annual Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware, pp. 1285-1292, Orlando (United States), Jul 2017. DOI: 10.1109/IPDPSW.2017.32.

  • Xubin Tan, Jaume Bosch, Miquel Vidal, Carlos Álvarez, Daniel Jiménez, Eduard Ayguadé and Mateo Valero. General Purpose Task-Dependence Management Hardware for Task-Based Dataflow Programming Models. In 2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS), pp. 244-253, Orlando (United States), Jul 2017.

  • Sara Royuela, Alejandro Duran, Maria A. Serrano, Eduard Quiñones and Xavier Martorell. A functional safety OpenMP for critical real-time embedded systems. In 13th International Workshop on OpenMP (IWOMP), New York (United States), Sep 2017.

  • Brian Jiménez, Jorge Roel-Touris, Miguel Romero-Durana, Miquel Vidal, Daniel Jiménez and Juan Fernández-Recio. LightDock: a new multi-scale approach to protein–protein docking. Bioinformatics, Sep 2017. https://doi.org/10.1093/bioinformatics/btx555.

  • Leonidas Kosmidis. Enabling Caches in Probabilistic Timing Analysis. PhD thesis, Universitat Politècnica de Catalunya (UPC), Sep 2017. Advisor Eduard Quiñones, Jaume Abella, Francisco J. Cazorla and Mateo Valero.

  • Joan del Castillo, Maria Padilla, Jaume Abella and Francisco J. Cazorla. Execution time distributions in embedded safety-critical systems using extreme value theory. International Journal of Data Analysis Techniques and Strategies (IJDATS), Dec 2017. (to appear).

  • Jaume Abella, Maria Padilla, Joan del Castillo and Francisco J. Cazorla. Measurement-Based Worst-Case Execution Time Estimation Using the Coefficient of Variation. ACM Transactions on Design Automation of Electronic Systems , Dec 2017. (to appear).
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